Author: Luke Kenneth Casson Leighton 2021-02-13 17:19:01
Published on: 2021-02-13T17:19:01+00:00
In an email thread on Bitcoin-dev, ZmnSCPxj raised concerns about the use of repeater-buffers in ASICs. According to him, 50% of a 28nm ASIC is composed of repeater-buffers. Lower geometries are even less able to line-drive long distances. Another point to ponder is test modes as they are needed for mass production. He also mentioned that if an ASIC can be flipped into TESTMODE and yet it carries on otherwise working, an algorithm can be re-run and the exposed data will be clean. Open-sourcing hardware design has its risks too as attackers can probably target specific chip area for ESD pulse to try a flip-flop upset. A gating method has already been deployed by the Libre Cell Library to prevent errors from causing permanent HI which locks us from being able to perform testing of other areas of the ASIC. The idea of being able to actually randomly flip bits inside an ASIC from outside is both hilarious and entirely news to him. The trezor team discovered the importance of transparency in wallets and now it is even more important that wallet ASICs be Libre/Open.
Updated on: 2023-06-14T17:14:23.964719+00:00